Chip Kerchner e7f53d6ac9 lsws/ppc/yuv2rgb_altivec: Fix build in non-VSX environments ... Add inline function for vec_xl if VSX is not supported. vec_xl intrinsic is only available on POWER 7 or higher. Fixes ticket #8750. Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>		2021-02-22 23:19:21 -05:00
..
aarch64	aarch64/yuv2rgb_neon: fix return value	2020-07-09 10:33:14 +01:00
arm
ppc	lsws/ppc/yuv2rgb_altivec: Fix build in non-VSX environments	2021-02-22 23:19:21 -05:00
tests	libswscale/tests: add floatimg_cmp test	2020-10-02 14:59:52 +02:00
x86	swscale/x86/yuv2yuvX: use the movsxdifnidn helper macro	2021-02-18 18:47:43 -03:00
alphablend.c
bayer_template.c	swscale: do not drop half of bits from 16bit bayer formats	2020-08-08 12:03:42 +02:00
gamma.c
hscale_fast_bilinear.c
hscale.c
input.c	libswcale/input: use more accurate planer rgb16 yuv conversions	2020-10-06 17:56:52 +02:00
libswscale.v
log2_tab.c
Makefile	libswscale/tests: add floatimg_cmp test	2020-10-02 14:59:52 +02:00
options.c
output.c	lavu/mem: move the DECLARE_ALIGNED macro family to mem_internal on next+1 bump	2021-01-01 14:14:57 +01:00
rgb2rgb_template.c	swscale/rgb2rgb_template: use shuffle macro on big-endian arches	2020-12-12 23:07:22 -05:00
rgb2rgb.c
rgb2rgb.h
slice.c	libswscale: avoid UB nullptr-with-offset.	2020-12-24 15:27:56 +01:00
swscale_internal.h	lavu/mem: move the DECLARE_ALIGNED macro family to mem_internal on next+1 bump	2021-01-01 14:14:57 +01:00
swscale_unscaled.c	lavu/mem: move the DECLARE_ALIGNED macro family to mem_internal on next+1 bump	2021-01-01 14:14:57 +01:00
swscale.c	lavu/mem: move the DECLARE_ALIGNED macro family to mem_internal on next+1 bump	2021-01-01 14:14:57 +01:00
swscale.h
swscaleres.rc
utils.c	swscale/utils: override forced-zero formats back to full range	2020-10-11 12:58:13 +03:00
version.h	Bump minor versions after branching 4.3	2020-06-08 22:49:04 +02:00
vscale.c	swscale: make yuv2interleavedX more asm-friendly	2020-06-14 16:34:07 +01:00
yuv2rgb.c	swscale/yuv2rgb: cosmetics	2020-07-25 10:20:42 +08:00