Altivec version of h264_(h|v)_loop_filter_luma
patch by Graham Booker % perian A cod3r P com% with some minor fixes by me. historic of the patch: http://trac.perian.org/ticket/113 Original thread: Date: May 11, 2007 9:45 PM Subject: [FFmpeg-devel] [PATCH] Altivec version of-altivec h264_h-v_loop_filter_luma Originally committed as revision 9264 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Graham Booker
Guillaume Poirier
parent
12807c8d87
commit
f057cc0399
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@ -101,6 +101,17 @@ do { \
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h = vec_mergel (D2, H2); \
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} while (0)
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/** \brief loads unaligned vector \a *src with offset \a offset
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and returns it */
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static inline vector unsigned char unaligned_load(int offset, uint8_t *src)
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{
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register vector unsigned char first = vec_ld(offset, src);
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register vector unsigned char second = vec_ld(offset+15, src);
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register vector unsigned char mask = vec_lvsl(offset, src);
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return vec_perm(first, second, mask);
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}
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#endif /* HAVE_ALTIVEC */
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#endif /* _DSPUTIL_ALTIVEC_ */
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@ -600,6 +600,272 @@ void ff_h264_idct8_add_altivec( uint8_t *dst, DCTELEM *dct, int stride ) {
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ALTIVEC_STORE_SUM_CLIP(&dst[7*stride], idct7, perm_ldv, perm_stv, sel);
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}
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#define transpose4x16(r0, r1, r2, r3) { \
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register vector unsigned char r4; \
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register vector unsigned char r5; \
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register vector unsigned char r6; \
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register vector unsigned char r7; \
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\
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r4 = vec_mergeh(r0, r2); /*0, 2 set 0*/ \
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r5 = vec_mergel(r0, r2); /*0, 2 set 1*/ \
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r6 = vec_mergeh(r1, r3); /*1, 3 set 0*/ \
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r7 = vec_mergel(r1, r3); /*1, 3 set 1*/ \
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\
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r0 = vec_mergeh(r4, r6); /*all set 0*/ \
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r1 = vec_mergel(r4, r6); /*all set 1*/ \
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r2 = vec_mergeh(r5, r7); /*all set 2*/ \
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r3 = vec_mergel(r5, r7); /*all set 3*/ \
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}
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static inline void write16x4(uint8_t *dst, int dst_stride, register vector unsigned char r0,
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register vector unsigned char r1, register vector unsigned char r2,
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register vector unsigned char r3) {
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DECLARE_ALIGNED_16(unsigned char, result[64]);
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uint32_t *src_int = (uint32_t *)result, *dst_int = (uint32_t *)dst;
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int int_dst_stride = dst_stride/4;
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vec_st(r0, 0, result);
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vec_st(r1, 16, result);
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vec_st(r2, 32, result);
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vec_st(r3, 48, result);
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/* FIXME: there has to be a better way!!!! */
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*dst_int = *src_int;
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*(dst_int+ int_dst_stride) = *(src_int + 1);
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*(dst_int+ 2*int_dst_stride) = *(src_int + 2);
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*(dst_int+ 3*int_dst_stride) = *(src_int + 3);
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*(dst_int+ 4*int_dst_stride) = *(src_int + 4);
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*(dst_int+ 5*int_dst_stride) = *(src_int + 5);
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*(dst_int+ 6*int_dst_stride) = *(src_int + 6);
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*(dst_int+ 7*int_dst_stride) = *(src_int + 7);
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*(dst_int+ 8*int_dst_stride) = *(src_int + 8);
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*(dst_int+ 9*int_dst_stride) = *(src_int + 9);
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*(dst_int+10*int_dst_stride) = *(src_int + 10);
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*(dst_int+11*int_dst_stride) = *(src_int + 11);
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*(dst_int+12*int_dst_stride) = *(src_int + 12);
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*(dst_int+13*int_dst_stride) = *(src_int + 13);
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*(dst_int+14*int_dst_stride) = *(src_int + 14);
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*(dst_int+15*int_dst_stride) = *(src_int + 15);
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}
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/** \brief performs a 6x16 transpose of data in src, and stores it to dst
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\todo FIXME: see if we can't spare some vec_lvsl() by them factorizing
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out of unaligned_load() */
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#define readAndTranspose16x6(src, src_stride, r8, r9, r10, r11, r12, r13) {\
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register vector unsigned char r0 = unaligned_load(0, src);\
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register vector unsigned char r1 = unaligned_load( src_stride, src);\
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register vector unsigned char r2 = unaligned_load(2* src_stride, src);\
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register vector unsigned char r3 = unaligned_load(3* src_stride, src);\
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register vector unsigned char r4 = unaligned_load(4* src_stride, src);\
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register vector unsigned char r5 = unaligned_load(5* src_stride, src);\
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register vector unsigned char r6 = unaligned_load(6* src_stride, src);\
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register vector unsigned char r7 = unaligned_load(7* src_stride, src);\
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register vector unsigned char r14 = unaligned_load(14*src_stride, src);\
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register vector unsigned char r15 = unaligned_load(15*src_stride, src);\
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\
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r8 = unaligned_load( 8*src_stride, src); \
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r9 = unaligned_load( 9*src_stride, src); \
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r10 = unaligned_load(10*src_stride, src); \
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r11 = unaligned_load(11*src_stride, src); \
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r12 = unaligned_load(12*src_stride, src); \
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r13 = unaligned_load(13*src_stride, src); \
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\
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/*Merge first pairs*/ \
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r0 = vec_mergeh(r0, r8); /*0, 8*/ \
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r1 = vec_mergeh(r1, r9); /*1, 9*/ \
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r2 = vec_mergeh(r2, r10); /*2,10*/ \
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r3 = vec_mergeh(r3, r11); /*3,11*/ \
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r4 = vec_mergeh(r4, r12); /*4,12*/ \
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r5 = vec_mergeh(r5, r13); /*5,13*/ \
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r6 = vec_mergeh(r6, r14); /*6,14*/ \
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r7 = vec_mergeh(r7, r15); /*7,15*/ \
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\
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/*Merge second pairs*/ \
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r8 = vec_mergeh(r0, r4); /*0,4, 8,12 set 0*/ \
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r9 = vec_mergel(r0, r4); /*0,4, 8,12 set 1*/ \
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r10 = vec_mergeh(r1, r5); /*1,5, 9,13 set 0*/ \
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r11 = vec_mergel(r1, r5); /*1,5, 9,13 set 1*/ \
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r12 = vec_mergeh(r2, r6); /*2,6,10,14 set 0*/ \
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r13 = vec_mergel(r2, r6); /*2,6,10,14 set 1*/ \
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r14 = vec_mergeh(r3, r7); /*3,7,11,15 set 0*/ \
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r15 = vec_mergel(r3, r7); /*3,7,11,15 set 1*/ \
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\
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/*Third merge*/ \
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r0 = vec_mergeh(r8, r12); /*0,2,4,6,8,10,12,14 set 0*/ \
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r1 = vec_mergel(r8, r12); /*0,2,4,6,8,10,12,14 set 1*/ \
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r2 = vec_mergeh(r9, r13); /*0,2,4,6,8,10,12,14 set 2*/ \
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r4 = vec_mergeh(r10, r14); /*1,3,5,7,9,11,13,15 set 0*/ \
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r5 = vec_mergel(r10, r14); /*1,3,5,7,9,11,13,15 set 1*/ \
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r6 = vec_mergeh(r11, r15); /*1,3,5,7,9,11,13,15 set 2*/ \
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/* Don't need to compute 3 and 7*/ \
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\
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/*Final merge*/ \
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r8 = vec_mergeh(r0, r4); /*all set 0*/ \
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r9 = vec_mergel(r0, r4); /*all set 1*/ \
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r10 = vec_mergeh(r1, r5); /*all set 2*/ \
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r11 = vec_mergel(r1, r5); /*all set 3*/ \
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r12 = vec_mergeh(r2, r6); /*all set 4*/ \
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r13 = vec_mergel(r2, r6); /*all set 5*/ \
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/* Don't need to compute 14 and 15*/ \
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\
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}
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// out: o = |x-y| < a
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static inline vector unsigned char diff_lt_altivec ( register vector unsigned char x,
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register vector unsigned char y,
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register vector unsigned char a) {
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register vector unsigned char diff = vec_subs(x, y);
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register vector unsigned char diffneg = vec_subs(y, x);
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register vector unsigned char o = vec_or(diff, diffneg); /* |x-y| */
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o = vec_cmplt(o, a);
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return o;
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}
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static inline vector unsigned char h264_deblock_mask ( register vector unsigned char p0,
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register vector unsigned char p1,
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register vector unsigned char q0,
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register vector unsigned char q1,
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register vector unsigned char alpha,
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register vector unsigned char beta) {
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register vector unsigned char mask;
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register vector unsigned char tempmask;
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mask = diff_lt_altivec(p0, q0, alpha);
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tempmask = diff_lt_altivec(p1, p0, beta);
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mask = vec_and(mask, tempmask);
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tempmask = diff_lt_altivec(q1, q0, beta);
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mask = vec_and(mask, tempmask);
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return mask;
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}
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// out: p1 = clip((p2 + ((p0 + q0 + 1) >> 1)) >> 1, p1-tc0, p1+tc0)
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#define h264_deblock_q1(p0, p1, p2, q0, tc0) { \
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\
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register vector unsigned char average = vec_avg(p0, q0); \
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register vector unsigned char temp; \
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register vector unsigned char uncliped; \
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register vector unsigned char ones; \
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register vector unsigned char max; \
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register vector unsigned char min; \
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\
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temp = vec_xor(average, p2); \
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average = vec_avg(average, p2); /*avg(p2, avg(p0, q0)) */ \
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ones = vec_splat_u8(1); \
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temp = vec_and(temp, ones); /*(p2^avg(p0, q0)) & 1 */ \
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uncliped = vec_subs(average, temp); /*(p2+((p0+q0+1)>>1))>>1 */\
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max = vec_adds(p1, tc0); \
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min = vec_subs(p1, tc0); \
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p1 = vec_max(min, uncliped); \
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p1 = vec_min(max, p1); \
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}
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#define h264_deblock_p0_q0(p0, p1, q0, q1, tc0masked) { \
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\
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const vec_u8_t A0v = (vec_u8_t) AVV(0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0, \
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0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0,0xA0); \
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\
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register vector unsigned char pq0bit = vec_xor(p0,q0); \
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register vector unsigned char temp; \
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register vector unsigned char q1minus; \
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register vector unsigned char p0minus; \
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register vector unsigned char stage1; \
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register vector unsigned char stage2; \
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register vector unsigned char vec160; \
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register vector unsigned char delta; \
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register vector unsigned char deltaneg; \
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\
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temp = vec_cmpeq(p0, p0); \
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q1minus = vec_xor(temp, q1); /* 255 - q1 */ \
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stage1 = vec_avg(p1, q1minus); /* (p1 - q1 + 256)>>1 */ \
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stage2 = vec_sr(stage1, vec_splat_u8(1)); /* (p1 - q1 + 256)>>2 = 64 + (p1 - q1) >> 2 */ \
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p0minus = vec_xor(temp, p0); /* 255 - p0 */ \
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stage1 = vec_avg(q0, p0minus); /* (q0 - p0 + 256)>>1 */ \
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pq0bit = vec_and(pq0bit, vec_splat_u8(1)); \
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stage2 = vec_avg(stage2, pq0bit); /* 32 + ((q0 - p0)&1 + (p1 - q1) >> 2 + 1) >> 1 */ \
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stage2 = vec_adds(stage2, stage1); /* 160 + ((p0 - q0) + (p1 - q1) >> 2 + 1) >> 1 */ \
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vec160 = vec_ld(0, &A0v); \
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deltaneg = vec_subs(vec160, stage2); /* -d */ \
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delta = vec_subs(stage2, vec160); /* d */ \
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deltaneg = vec_min(tc0masked, deltaneg); \
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delta = vec_min(tc0masked, delta); \
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p0 = vec_subs(p0, deltaneg); \
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q0 = vec_subs(q0, delta); \
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p0 = vec_adds(p0, delta); \
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q0 = vec_adds(q0, deltaneg); \
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}
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#define h264_loop_filter_luma_altivec(p2, p1, p0, q0, q1, q2, alpha, beta, tc0) { \
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DECLARE_ALIGNED_16(unsigned char, temp[16]); \
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register vector unsigned char alphavec; \
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register vector unsigned char betavec; \
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register vector unsigned char mask; \
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register vector unsigned char p1mask; \
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register vector unsigned char q1mask; \
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register vector char tc0vec; \
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register vector unsigned char finaltc0; \
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register vector unsigned char tc0masked; \
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\
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temp[0] = alpha; \
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temp[1] = beta; \
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alphavec = vec_ld(0, temp); \
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betavec = vec_splat(alphavec, 0x1); \
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alphavec = vec_splat(alphavec, 0x0); \
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mask = h264_deblock_mask(p0, p1, q0, q1, alphavec, betavec); /*if in block */ \
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\
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*((int *)temp) = *((int *)tc0); \
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tc0vec = vec_ld(0, temp); \
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tc0vec = vec_mergeh(tc0vec, tc0vec); \
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tc0vec = vec_mergeh(tc0vec, tc0vec); \
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mask = vec_and(mask, vec_cmpgt(tc0vec, vec_splat_u8(-1))); /* if tc0[i] >= 0 */ \
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finaltc0 = vec_and(tc0vec, mask); /*tc = tc0[i]*/ \
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\
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p1mask = diff_lt_altivec(p2, p0, betavec); \
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p1mask = vec_and(p1mask, mask); /* if( |p2 - p0| < beta) */ \
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tc0masked = vec_and(p1mask, tc0vec); \
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finaltc0 = vec_sub(finaltc0, p1mask); /* tc++ */ \
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h264_deblock_q1(p0, p1, p2, q0, tc0masked); \
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/*end if*/ \
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\
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q1mask = diff_lt_altivec(q2, q0, betavec); \
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q1mask = vec_and(q1mask, mask); /* if ( |q2 - q0| < beta ) */\
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tc0masked = vec_and(q1mask, tc0vec); \
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finaltc0 = vec_sub(finaltc0, q1mask); /* tc++ */ \
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h264_deblock_q1(p0, q1, q2, q0, tc0masked); \
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/*end if*/ \
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\
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h264_deblock_p0_q0(p0, p1, q0, q1, finaltc0); \
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}
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static void h264_v_loop_filter_luma_altivec(uint8_t *pix, int stride, int alpha, int beta, int8_t *tc0) {
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if((tc0[0] & tc0[1] & tc0[2] & tc0[3]) >= 0) {
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register vector unsigned char p2 = vec_ld(-3*stride, pix);
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register vector unsigned char p1 = vec_ld(-2*stride, pix);
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register vector unsigned char p0 = vec_ld(-1*stride, pix);
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register vector unsigned char q0 = vec_ld(0, pix);
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register vector unsigned char q1 = vec_ld(stride, pix);
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register vector unsigned char q2 = vec_ld(2*stride, pix);
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h264_loop_filter_luma_altivec(p2, p1, p0, q0, q1, q2, alpha, beta, tc0);
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vec_st(p1, -2*stride, pix);
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vec_st(p0, -1*stride, pix);
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vec_st(q0, 0, pix);
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vec_st(q1, stride, pix);
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}
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}
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static void h264_h_loop_filter_luma_altivec(uint8_t *pix, int stride, int alpha, int beta, int8_t *tc0) {
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register vector unsigned char line0, line1, line2, line3, line4, line5;
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if((tc0[0] & tc0[1] & tc0[2] & tc0[3]) < 0)
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return;
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readAndTranspose16x6(pix-3, stride, line0, line1, line2, line3, line4, line5);
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h264_loop_filter_luma_altivec(line0, line1, line2, line3, line4, line5, alpha, beta, tc0);
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transpose4x16(line1, line2, line3, line4);
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write16x4(pix-2, stride, line1, line2, line3, line4);
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}
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void dsputil_h264_init_ppc(DSPContext* c, AVCodecContext *avctx) {
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#ifdef HAVE_ALTIVEC
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@ -609,6 +875,8 @@ void dsputil_h264_init_ppc(DSPContext* c, AVCodecContext *avctx) {
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c->avg_h264_chroma_pixels_tab[0] = avg_h264_chroma_mc8_altivec;
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c->h264_idct_add = ff_h264_idct_add_altivec;
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c->h264_idct8_add = ff_h264_idct8_add_altivec;
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c->h264_v_loop_filter_luma= h264_v_loop_filter_luma_altivec;
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c->h264_h_loop_filter_luma= h264_h_loop_filter_luma_altivec;
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#define dspfunc(PFX, IDX, NUM) \
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c->PFX ## _pixels_tab[IDX][ 0] = PFX ## NUM ## _mc00_altivec; \
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