aarch64: vp9itxfm16: Restructure the idct32 store macros
This avoids concatenation, which can't be used if the whole macro is wrapped within another macro. Signed-off-by: Martin Storsjö <martin@martin.st>
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Martin Storsjö
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d613251622
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b76533f105
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@ -1244,27 +1244,27 @@ function idct32_1d_4x32_pass1_neon
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.macro store_rev a, b, c, d
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// There's no rev128 instruction, but we reverse each 64 bit
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// half, and then flip them using an ext with 8 bytes offset.
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rev64 v7.4s, v\d\().4s
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st1 {v\a\().4s}, [x0], #16
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rev64 v7.4s, \d
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st1 {\a}, [x0], #16
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ext v7.16b, v7.16b, v7.16b, #8
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st1 {v\b\().4s}, [x0], #16
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rev64 v6.4s, v\c\().4s
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st1 {v\c\().4s}, [x0], #16
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st1 {\b}, [x0], #16
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rev64 v6.4s, \c
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st1 {\c}, [x0], #16
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ext v6.16b, v6.16b, v6.16b, #8
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st1 {v\d\().4s}, [x0], #16
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rev64 v5.4s, v\b\().4s
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st1 {\d}, [x0], #16
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rev64 v5.4s, \b
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st1 {v7.4s}, [x0], #16
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ext v5.16b, v5.16b, v5.16b, #8
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st1 {v6.4s}, [x0], #16
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rev64 v4.4s, v\a\().4s
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rev64 v4.4s, \a
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st1 {v5.4s}, [x0], #16
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ext v4.16b, v4.16b, v4.16b, #8
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st1 {v4.4s}, [x0], #16
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.endm
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store_rev 16, 20, 24, 28
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store_rev 17, 21, 25, 29
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store_rev 18, 22, 26, 30
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store_rev 19, 23, 27, 31
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store_rev v16.4s, v20.4s, v24.4s, v28.4s
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store_rev v17.4s, v21.4s, v25.4s, v29.4s
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store_rev v18.4s, v22.4s, v26.4s, v30.4s
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store_rev v19.4s, v23.4s, v27.4s, v31.4s
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sub x0, x0, #512
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.purgem store_rev
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@ -1290,27 +1290,27 @@ function idct32_1d_4x32_pass1_neon
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// Store the registers a, b, c, d horizontally,
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// adding into the output first, and the mirrored,
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// subtracted from the output.
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.macro store_rev a, b, c, d
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.macro store_rev a, b, c, d, a16b, b16b
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ld1 {v4.4s}, [x0]
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rev64 v9.4s, v\d\().4s
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add v4.4s, v4.4s, v\a\().4s
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rev64 v9.4s, \d
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add v4.4s, v4.4s, \a
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st1 {v4.4s}, [x0], #16
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rev64 v8.4s, v\c\().4s
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rev64 v8.4s, \c
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ld1 {v4.4s}, [x0]
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ext v9.16b, v9.16b, v9.16b, #8
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add v4.4s, v4.4s, v\b\().4s
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add v4.4s, v4.4s, \b
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st1 {v4.4s}, [x0], #16
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ext v8.16b, v8.16b, v8.16b, #8
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ld1 {v4.4s}, [x0]
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rev64 v\b\().4s, v\b\().4s
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add v4.4s, v4.4s, v\c\().4s
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rev64 \b, \b
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add v4.4s, v4.4s, \c
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st1 {v4.4s}, [x0], #16
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rev64 v\a\().4s, v\a\().4s
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rev64 \a, \a
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ld1 {v4.4s}, [x0]
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ext v\b\().16b, v\b\().16b, v\b\().16b, #8
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add v4.4s, v4.4s, v\d\().4s
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ext \b16b, \b16b, \b16b, #8
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add v4.4s, v4.4s, \d
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st1 {v4.4s}, [x0], #16
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ext v\a\().16b, v\a\().16b, v\a\().16b, #8
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ext \a16b, \a16b, \a16b, #8
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ld1 {v4.4s}, [x0]
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sub v4.4s, v4.4s, v9.4s
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st1 {v4.4s}, [x0], #16
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@ -1318,17 +1318,17 @@ function idct32_1d_4x32_pass1_neon
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sub v4.4s, v4.4s, v8.4s
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st1 {v4.4s}, [x0], #16
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ld1 {v4.4s}, [x0]
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sub v4.4s, v4.4s, v\b\().4s
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sub v4.4s, v4.4s, \b
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st1 {v4.4s}, [x0], #16
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ld1 {v4.4s}, [x0]
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sub v4.4s, v4.4s, v\a\().4s
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sub v4.4s, v4.4s, \a
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st1 {v4.4s}, [x0], #16
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.endm
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store_rev 31, 27, 23, 19
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store_rev 30, 26, 22, 18
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store_rev 29, 25, 21, 17
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store_rev 28, 24, 20, 16
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store_rev v31.4s, v27.4s, v23.4s, v19.4s, v31.16b, v27.16b
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store_rev v30.4s, v26.4s, v22.4s, v18.4s, v30.16b, v26.16b
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store_rev v29.4s, v25.4s, v21.4s, v17.4s, v29.16b, v25.16b
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store_rev v28.4s, v24.4s, v20.4s, v16.4s, v28.16b, v24.16b
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.purgem store_rev
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ret
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endfunc
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@ -1370,21 +1370,21 @@ function idct32_1d_4x32_pass2_neon
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.if \neg == 0
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ld1 {v4.4s}, [x2], x9
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ld1 {v5.4s}, [x2], x9
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add v4.4s, v4.4s, v\a\().4s
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add v4.4s, v4.4s, \a
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ld1 {v6.4s}, [x2], x9
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add v5.4s, v5.4s, v\b\().4s
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add v5.4s, v5.4s, \b
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ld1 {v7.4s}, [x2], x9
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add v6.4s, v6.4s, v\c\().4s
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add v7.4s, v7.4s, v\d\().4s
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add v6.4s, v6.4s, \c
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add v7.4s, v7.4s, \d
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.else
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ld1 {v4.4s}, [x2], x7
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ld1 {v5.4s}, [x2], x7
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sub v4.4s, v4.4s, v\a\().4s
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sub v4.4s, v4.4s, \a
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ld1 {v6.4s}, [x2], x7
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sub v5.4s, v5.4s, v\b\().4s
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sub v5.4s, v5.4s, \b
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ld1 {v7.4s}, [x2], x7
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sub v6.4s, v6.4s, v\c\().4s
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sub v7.4s, v7.4s, v\d\().4s
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sub v6.4s, v6.4s, \c
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sub v7.4s, v7.4s, \d
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.endif
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ld1 {v8.4h}, [x0], x1
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ld1 {v8.d}[1], [x0], x1
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@ -1410,15 +1410,15 @@ function idct32_1d_4x32_pass2_neon
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st1 {v5.4h}, [x0], x1
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st1 {v5.d}[1], [x0], x1
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.endm
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load_acc_store 31, 30, 29, 28
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load_acc_store 27, 26, 25, 24
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load_acc_store 23, 22, 21, 20
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load_acc_store 19, 18, 17, 16
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load_acc_store v31.4s, v30.4s, v29.4s, v28.4s
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load_acc_store v27.4s, v26.4s, v25.4s, v24.4s
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load_acc_store v23.4s, v22.4s, v21.4s, v20.4s
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load_acc_store v19.4s, v18.4s, v17.4s, v16.4s
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sub x2, x2, x9
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load_acc_store 16, 17, 18, 19, 1
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load_acc_store 20, 21, 22, 23, 1
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load_acc_store 24, 25, 26, 27, 1
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load_acc_store 28, 29, 30, 31, 1
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load_acc_store v16.4s, v17.4s, v18.4s, v19.4s, 1
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load_acc_store v20.4s, v21.4s, v22.4s, v23.4s, 1
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load_acc_store v24.4s, v25.4s, v26.4s, v27.4s, 1
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load_acc_store v28.4s, v29.4s, v30.4s, v31.4s, 1
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.purgem load_acc_store
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ret
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endfunc
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