Revert "lavc/aarch64: add hevc sao edge 16x16"
This reverts commit a9214a2ca3
, as
it breaks fate-hevc.
Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
parent
df48b1d06f
commit
16fba44b4d
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@ -57,8 +57,8 @@ void ff_hevc_sao_band_filter_8x8_8_neon(uint8_t *_dst, uint8_t *_src,
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ptrdiff_t stride_dst, ptrdiff_t stride_src,
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ptrdiff_t stride_dst, ptrdiff_t stride_src,
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int16_t *sao_offset_val, int sao_left_class,
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int16_t *sao_offset_val, int sao_left_class,
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int width, int height);
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int width, int height);
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void ff_hevc_sao_edge_filter_16x16_8_neon(uint8_t *dst, uint8_t *src, ptrdiff_t stride_dst,
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int16_t *sao_offset_val, int eo, int width, int height);
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av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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{
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{
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@ -76,10 +76,6 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_8_neon;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_8_neon;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_8_neon;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_8_neon;
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c->sao_band_filter[0] = ff_hevc_sao_band_filter_8x8_8_neon;
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c->sao_band_filter[0] = ff_hevc_sao_band_filter_8x8_8_neon;
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c->sao_edge_filter[1] =
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c->sao_edge_filter[2] =
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c->sao_edge_filter[3] =
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c->sao_edge_filter[4] = ff_hevc_sao_edge_filter_16x16_8_neon;
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}
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}
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if (bit_depth == 10) {
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if (bit_depth == 10) {
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c->add_residual[0] = ff_hevc_add_residual_4x4_10_neon;
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c->add_residual[0] = ff_hevc_add_residual_4x4_10_neon;
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@ -70,68 +70,3 @@ function ff_hevc_sao_band_filter_8x8_8_neon, export=1
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bne 1b
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bne 1b
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ret
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ret
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endfunc
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endfunc
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// ASSUMES STRIDE_SRC = 192
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.Lsao_edge_pos:
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.word 1 // horizontal
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.word 192 // vertical
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.word 192 + 1 // 45 degree
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.word 192 - 1 // 135 degree
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// ff_hevc_sao_edge_filter_16x16_8_neon(char *dst, char *src, ptrdiff stride_dst,
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// int16 *sao_offset_val, int eo, int width, int height)
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function ff_hevc_sao_edge_filter_16x16_8_neon, export=1
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adr x7, .Lsao_edge_pos
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ld1 {v3.8h}, [x3] // load sao_offset_val
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sxtw x5, w5
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ldr w4, [x7, w4, uxtw #2] // stride_src
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mov v3.h[7], v3.h[0] // reorder to [1,2,0,3,4]
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mov v3.h[0], v3.h[1]
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mov v3.h[1], v3.h[2]
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mov v3.h[2], v3.h[7]
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// split 16bit values into two tables
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uzp2 v1.16b, v3.16b, v3.16b // sao_offset_val -> upper
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uzp1 v0.16b, v3.16b, v3.16b // sao_offset_val -> lower
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movi v2.16b, #2
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mov x15, #192
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// strides between end of line and next src/dst
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sub x15, x15, x5 // stride_src - width
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sub x16, x2, x5 // stride_dst - width
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mov x11, x1 // copy base src
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1: // new line
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mov x14, x5 // copy width
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sub x12, x11, x4 // src_a (prev) = src - sao_edge_pos
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add x13, x11, x4 // src_b (next) = src + sao_edge_pos
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2: // process 16 bytes
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ld1 {v3.16b}, [x11], #16 // load src
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ld1 {v4.16b}, [x12], #16 // load src_a (prev)
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ld1 {v5.16b}, [x13], #16 // load src_b (next)
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cmhi v16.16b, v4.16b, v3.16b // (prev > cur)
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cmhi v17.16b, v3.16b, v4.16b // (cur > prev)
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cmhi v18.16b, v5.16b, v3.16b // (next > cur)
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cmhi v19.16b, v3.16b, v5.16b // (cur > next)
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sub v20.16b, v16.16b, v17.16b // diff0 = CMP(cur, prev) = (cur > prev) - (cur < prev)
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sub v21.16b, v18.16b, v19.16b // diff1 = CMP(cur, next) = (cur > next) - (cur < next)
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add v20.16b, v20.16b, v21.16b // diff = diff0 + diff1
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add v20.16b, v20.16b, v2.16b // offset_val = diff + 2
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tbl v16.16b, {v0.16b}, v20.16b
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tbl v17.16b, {v1.16b}, v20.16b
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uxtl v20.8h, v3.8b // src[0:7]
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uxtl2 v21.8h, v3.16b // src[7:15]
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zip1 v18.16b, v16.16b, v17.16b // sao_offset_val lower ->
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zip2 v19.16b, v16.16b, v17.16b // sao_offset_val upper ->
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sqadd v20.8h, v18.8h, v20.8h // + sao_offset_val
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sqadd v21.8h, v19.8h, v21.8h
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sqxtun v3.8b, v20.8h
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sqxtun2 v3.16b, v21.8h
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st1 {v3.16b}, [x0], #16
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subs x14, x14, #16 // filtered 16 bytes
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b.ne 2b // do we have width to filter?
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// no width to filter, setup next line
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add x11, x11, x15 // stride src to next line
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add x0, x0, x16 // stride dst to next line
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subs w6, w6, #1 // filtered line
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b.ne 1b // do we have lines to process?
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// no lines to filter
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ret
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endfunc
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